Abstract

   Encrypting data structure type FPGA or ASIC hardware is done at a much higher speed than the software implementations. TDES is one of the most well known algorithms with secret key used in data encryption. A variety of implementations in FPGA or ASIC hardware structures are currently made. This paper presents the implementation of this algorithm on a XILINX SPARTAN 3 reconfigurable structure. The implementation process is followed by the optimizations and a bigger speed data processing on the used surface of the circuit was achieved – such as a speed of 4.8 GB/s and 26% area structure. It describes how it works and finally presents the comparative results obtained from the implementations of digital module.